Principal Physical Design Engineer

Principal Physical Design Engineer – SoC Middle‑End (RTL2NETLIST) Responsibilities Perform design synthesis with Synopsys/Cadence toolset, with full knowledge and understanding of functional constraints Create timing constraints for functional, DFT modes for synthesis/STA by working closely with Design and DFT Engineers STA/timing closure Write low power intent file (CPF/UPF) from specification and verify correctness of power intent file using CLP/VCLP Perform logic equivalence checks Work with physical design engineer to resolve all netlist and timing issues Qualifications Master’s/Bachelor’s Degree in Electrical/Electronics Engineering with an emphasis in IC design Good experience with Synopsys tool suite or Cadence toolsuite Proficient in TCL scripting, python knowledge is a Able to work in a team with a strong drive to excel Able to work independently on a given assignment and work hard to finish on time Good written and communication skills Company Overview MaxLinear is a global, NASDAQ‑traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system‑on‑chip product company, striving to improve the world’s communication networks for everyone through our highly integrated radio‑frequency (RF), analog, digital, and mixed‑signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi‑market applications. We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems in the most efficient and effective manner. MaxLinear began by developing the world’s first high‑performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high‑performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long‑haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we’ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end‑to‑end solutions in our target markets. One such example was the acquisition of Intel’s Home Gateway Platform Division that added Wi‑Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers’ needs. Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Valencia, Spain; Bangalore, India; Munich, Germany; Israel; and Singapore. We have approximately 1,200 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside‑the‑box thinking, nimbleness, and collaboration. Together, we form a high‑energy business team that is focused on building the best and most innovative products on the market. J-18808-Ljbffr

Location: Singapore, Singapore, SG

Posted Date: 10/21/2025